FPGA stands for "Field Programmable Gate Array" and is a huge array of gates that can be programmed and rebuilt anytime, anywhere. Many users still do not understand what an FPGA is. "A huge set of gates" is a simplified description of the model. Some FPGAs have built-in hard blocks: memory controllers, high-speed communication interfaces, and PCIe endpoints. There are many gates inside the FPGA that can be freely connected together. The principle of operation is more or less similar to the connection of individual logic circuits. FPGAs are produced by the world's leading companies Xilinx, Altera, and Microsemi.
FPGA history
The FPGA industry grew out of PROM and PLD logic devices. In 1970 Philips invented the field programmable matrix. ATthe design of such an FPGA, which consisted of two plans, a specific implementation of logic circuits was achieved: programmable wired "AND" or "OR". This gave her the opportunity to implement the function in the form of Sum of Products.
Altera was founded in 1983, and already in 1984, it released the industry's first reprogrammable logic device - EP300 with a quartz window in the package, which allowed the use of an ultraviolet lamp on the matrix to remove the EPROM label.
To overcome cost and speed difficulties, a programmable array logic was developed that included only one programmable "AND" input into a fixed "OR" gate. PAL and PLA, along with other variants, are grouped as Simple Programmable Logic Devices (SPLDs). Such FPGAs, which are integrated on a single chip with interconnects provided to programmatically connect blocks, have been used to meet growing technology requirements. They are called complex PLDs and are developed by Altera.
Transistors are another class of electronic devices programmed based on gate array masks. They consist of transistor arrays that can be connected using custom wires. They have given way to logical blocks, and now the user can perform configuration on site, and not in the production laboratory.
The idea to develop the first commercially viable FPGA belongs to Xilinx co-founders Ross Freeman and Bernard Vonderschmitt. XC2064 was invented in 1985year and consisted of 64 custom logic blocks with 3 reference tables. It gives a modern understanding of what an FPGA is. It was in late 1980 when Steve Kasselman's proposed computer experiment with 6,000,000 reprogrammed gates found sponsors in the U. S. Navy Surface Warfare Division and then received a patent in 1992.
By the end of 1990, there was a lot of competition in the production of FPGAs, then Xilinx's market share began to decline. Players such as Actel, Altera, Lattice, QuickLogic, Cypress, Lucent and SiliconBlue have carved their niche in the global FPGA market alongside Xilinx. In 1997, Adrian Thompson managed to combine FPGA programming and genetic algorithm technology with FPGA, starting a new era of Evolvable.
Today, FPGAs have become quite affordable, and therefore continue to gain popularity in consumer markets. They consist of a set of logical cells called lookup tables LUTs surrounded by an interconnect network providing a flexible system that can implement almost any digital algorithm.
Programming principles
FPGA programming for beginners is the process of learning, planning, designing and implementing an FPGA solution. The number and type of layouts vary from program to program. Creating a requirements document and creating a design document explaining how the proposed solution will be implemented can be very helpful in solving potential problems.
The time spent on creating a quality design document will save him in the future on refactoring, debugging and fixing errors. Implementing a solution using FPGA programming involves creating a project using one of the project entry methods. Among them are schematics or HDL code such as Verilog or VHDL. FPGAs can program an output file to a physical FPGA device using Altera's FPGA programming tools. The introduction of schema design is no longer used in the industry. Synthesis and programming almost entirely taken care of by vendor tools such as ISE and Vivado and Numato Lab configuration tools.
RTL register transfer level
RTL stands for register transfer level. The designer may also come across the terms Register Transfer Logic or Register Transfer Language, they all mean the same thing in the context of hardware design. RTL is a higher-level abstraction for digital hardware design that falls somewhere between strictly behavioral modeling at one end and purely structural at the gateway level at the other.
Modeling gates means describing the hardware using basic gates, which is quite tedious. RTL can be thought of as analogous to the term "pseudocode" used in basic FPGA programming. One can describe hardware design as a sequence of steps or data flow from one set of registers to the next in every clock cycle.
RTL is also called "data flow" design. Once an RTL design is ready, it is easier to turn it into real HDL code using languages such as Verilog, VHDL, SystemVerilog, or any other hardware description language.
FPGA is much more than just a set of gates. Although it is possible to build logical circuits of any complexity by organizing and connecting logical elements. It's a way to express logic in a simple format that can eventually be turned into an array of elements. Two popular methods to do this are Schema Introduction and Hardware Description Language HDL. Before it became widely used, engineers designed everything with schematics. They were very simple for small projects, but painfully unmanageable for large ones. One has only to imagine how Intel engineers draw circuits for a Pentium that has millions of gateways! This is unacceptably difficult.
Verilog is an HDL hardware description language that can be used for digital circuits in plain text. Learning Verilog is not that difficult if the user has programming experience. VHDL is another popular HDL widely used in the industry. Verilog and VHDL have more or less the same market acceptance, but users usually choose Verilog because it is easy to learn and has syntactical similarity to C.
Programming technologies
FPGAs can be considered building blocks that allow you to configure the equipment you want. It is a special form of PLD with higher density andenhanced functionality in a shorter period of time using CAD. FPGAs are available in a variety of options based on the programming technology used.
They can be programmed using:
- Antifuse Technology.
- Programming based on Flash technology as a device from Actel.
- FPGA can be reprogrammed several thousand times, which takes several minutes in the reprogramming field itself and has a non-volatile memory.
FPGA based on SRAM technology that offers unlimited reprogramming and very fast reconfiguration or partial reconfiguration on the fly with few extra circuits. Most companies such as Altera, Actel, Atmel and Xilinx make these devices.
Configurable logic blocks
Regardless of different manufacturers and slightly different architectures and feature sets, most FPGAs have a common approach. The basic building blocks of any FPGA are a flexible programmable "logic block" (CLB) surrounded by programmable "I/O blocks" with a hierarchy of routing channels connecting the various blocks on the board.
Also, they may consist of DLLs for allocating and managing the clock and RAM memory of a dedicated block, with the main building block being a logical cell. The latter consists of an input function generator, transfer logic, and storage elements. Generators are implemented as referencetables and depend on the introduction. For example, the Xilinx Spartan II has 4 input LUTs, each provided with 16X1 bit synchronous RAM, using multiplexers as shift registers to capture data in burst mode. The storage elements are sensitive to the edges of the triggers or to the level of the latches.
FPGA programming fragment:
- Arithmetic logic includes an XOR gate for full adder operation and isolation of logical carry lines.
- Input/output block and routing matrix. This block has inputs and outputs that support a wide range of signaling standards and interfaces.
The basic I/O block is shown below.
Buffers in the input and output paths route signals to the internal logic and output pads directly or through a flip-flop. They are configurable to various supported signaling standards, which can be user-defined and set externally.
Routing matrix
On any assembly line, the slow segment determines the overall productivity. Routing algorithms are used to develop the most efficient paths for optimal performance. Routing is done at different levels, such as local, general purpose routing between different CLBs, I/O routing between blocks and CLBs, dedicated routing for certain signal classes to maximize performance, and Global Routing for distributing clocks and other signals with very large fanouts.. The FPGA families also have large block RAM structures to complement distributed RAM LUTs, which vary in size for different FPGA devices.
FPGA design assumes basically the same approach as any VLSI system, the main steps being design, behavior simulation, synthesis, post-synthesis simulation, translation, mapping and routing, and subsequent analysis such as timing simulation and static timing analysis. On a computer, the design looks ordered and tiled, but there is actually imperfect placement and routing, resulting in poor performance.
To improve FPGA performance, you can always use more transistors. Service area is high. Installing more transistors means that large scale designs are possible. Leakage is a serious problem for FPGAs and at the same time is of interest. The use of asynchronous FPGA architecture shows the best results when combined with pipelining technology that reduces global inputs and improves throughput.
Quality and gate problems
System security has always been a major concern, as the code must be exposed each time it is loaded into the FPGA. Such flexibility makes the FPGA a potential threat of malicious modifications during manufacture, so the encryption of bit streams came to him in time.help.
Often inexperienced designers and users are faced with the dilemma of how powerful an FPGA is suitable for their designs. Manufacturers often provide metrics such as "number of gates". For example, Xilinx FPGA programming uses 3 metrics to measure FPGA volume, maximum gates, maximum memory bits, and typical gateway range. As long as they are consistent, migration between models is somewhat easier, but it rarely offers an accurate comparison across vendors due to diversity in architectures and performance differences.
The best metric is to compare the type and amount of logical resources provided. In addition to this, the developer must be fully aware of what exactly is needed from the device, since manufacturers can boast of features that will be of the least importance for work. For example, Altera's Stratix II EP2S180 has about 1, 86, 576 LUTs with 4 inputs, and the Xilinx Virtex-4 XC4VLX200 has 1, 78, 176, respectively. However, if only 177k LUTs are needed for the design, this will be sufficient.
If RAM is a desirable metric for a designer, neither Xilinx XC4VLX200's 6Mbps nor Altera EP2S180's 9Mbps would be preferred over the less advertised, older 9.9Mbps XC4VFX140 model.
Programming languages and software
Altera FPGA programming for beginners starts with language selection. The C, C++ or System C option allows you to use the capabilities of the largestdevices and, at the same time, achieve the similarity of realistic development graphics. The ability to use C-based for FPGA design is provided by HLS (high-level synthesis), which has been on the verge of a breakthrough for many years with a tool like Handle-C. This has become a reality recently with major vendors Altera and Xilinx offering HLS in their Spectra-Q and Vivado HLx toolboxes respectively.
A number of other implementations of C-based Altera FPGA programming for beginners are available, such as OpenCL, which is for software developers who want to improve performance with FPGAs without a deep understanding of FPGA design.
As with HDL, HLS has limitations when using C FPGA programming approaches, as with traditional HDL, developers have to work with a subset of the language. For example, it's hard to synthesize and implement system calls because you have to make sure everything is bounded and has a fixed size. The nice thing about HLS is that you can develop your own floating point algorithms and there is an HLS floating point to fixed point conversion tool.
Programming an FPGA with Xilinx software is not difficult at all. You can get it by purchasing Xilinx products, either for free or at a model-specific price. You can access the video on the profile site, which clearly shows the procedure for use. Of all the companies to choose from when looking for a field-programmable gate array, Xilinx is by far the best.everyone. They are the creators of this product and have made improvements to it over the years. Proprietary software is more powerful than ever.
Design stages
FPGA programming training can be done online as the platform is well represented on the internet. When setting up an FPGA, the first step is to design the circuit, which requires knowledge of digital electronics. Unlike programming, it is much more difficult to start slicing code if the architecture of the program is not clear. As soon as it becomes clear what needs to be implemented, they begin to describe the circuit using one of the languages: Verilog or VHDL.
The fact that indicates a paradigm shift is that they are not called FPGA programming languages, but are description languages. Due to the complexity of testing digital circuits, banks of tests that simulate the behavior of the equipment are usually used at this stage. This type of tool allows you to see the status of the signal at any time and check if there are transitions with the desired results.
The third stage known as circuit synthesis is one of the key. It selects the elements to be used and their relationship according to the description files. This step requires tools that facilitate and automate tasks in most situations.
Hardware and setup
Intel Quartus Prime Software Suite Lite Edition - FPGA design software. It is ideal for beginners as it can be downloadedfree and no license file required. You can download the software from the manufacturer's website. The files are large (several gigabytes) and may take a long time to download and install. To minimize the time and disk space required, it is recommended that you download only those items that are required for user tasks. When prompted for files to download, uncheck "Select All" and select only Quartus Prime and Cyclone V capable devices.
Project creation algorithm:
- Open the New Project Wizard.
- Choose Next > Directory > Name > top-level object.
- Select a directory to place the project, for example, "Blink" and place it in the intelFPGA_lite folder, but you can place it anywhere and click "Next".
- When prompted to create a directory, select Yes.
- Select "Empty Project" and click "Next".
- Add files and "Next".
- Set up families, devices and boards by selecting the following: family - Cyclone V, device - Cyclone V SE, base, device name: 5CSEBA6U2317.
- To select a specific device, press the up/down arrows to see the list of supported devices until 5CSEBA6U2317 appears.
- User may need to expand the Name field to see the full device name, click Next.
- When setting up the EDA tool, use standard tools, so there will be no changes, click "Next" and "Finish". The summary screen appears.
- Create an HDL file withimplementation of Verilog as HDL.
- Go to the File tab (main window) and select New.
- Select the Verilog HDL File and press the OK button.
- Select "File"> "Save as".
- Select a file name. This is the top-level file name and must match the project name.
- Press Save.
- Create a Verilog module.
- Copy and paste the Verilog code below into the blink.v window and then save the code file.
- Right click "Analysis and Synthesis" and then click "Start" to perform syntax check and synthesis of Verilog code.
If the process completes successfully, a green check mark is displayed next to the analysis and synthesis. If it's an error, check the syntax and make sure it exactly matches the block of code above.
All experienced programmers know that complex programs, even subroutines, don't work right the first time. Human abstraction abilities, based on experience, allow him to find solutions without worrying about the smallest details. But the hard truth is that the physical system that programs are built into requires that every little detail be taken into account before everything will work.
With the improvement of FPGA design software tools mainly from traditional vendors as well as independent tool vendors: Synplicity, FPGA is becoming more and more popular day by day. Now, FPGAs have begun to include specialized hardware for the functions required by the customer, reducing manufacturers' costs. Thus, in the future there may be competition between rigid and cheap systems with flexible cores. Costs are expected to drop even further in the near future as FPGAs become more popular.
Manufacturers have begun experimenting with the concept of integrating FPGAs into integrated circuits to create a hybrid device. The focus remains on interconnect routing, with less change in CLB architectures. As FPGAs continue to include processors, the next generation will require not only digital design hardware knowledge, but also developer experience in the one-time FPGA programming process. Overall, FPGA is expected to take market share in ASIC devices and become the dominant technology, covering many applications from various fields.
